Copyright (C) 1994,1995,1996,1997 Terumasa KODAKA, Takeshi KONO
■ 320KB (2D) floppy disk drive interface
Explanation o The PC-9801 first generation E / F / M has a built-in 320KB FDD I / F. 2D FDD
(PC-8031, etc.) of PC-8000 and PC-8800 series can be connected.
o Models other than the first PC-9801, E, F, and M do not support this interface.
It is not provided by expansion boards.
o The 320KB FDD consists of an independent subsystem and is connected to the PC-9800 series
main unit with an 8255A (equivalent) PIO.
The FDD subsystem consists of a Z80-equivalent CPU and an 8255A (equivalent) PIO, etc.,
and performs handshaking with the main unit. In the FDD subsystem side CPU, 8255A
(equivalent) PIO is located in I / O ports FC to FFh.
o The 320KB FDD I / F and the FDD subsystem are connected as shown in the figure below.
Figure: 8255A (equivalent) PIO connection
-------------------------------------------------------------------------------------
Main unit side 320KB FDD I / F subsystem
-------------------------------------------------------------------------------------
Port A ←---------¥ /----------→ Port A
×
Port B →---------/ ¥----------← Port B
Port C0 (DAV) ←-------¥ /-------→ Port C0 (DAV)
Port C1 (RFD) ←-------¥＼ ／/-------→ Port C1 (RFD)
Port C2 (DAC) ←-------¥＼¥／／/-------→ Port C2 (DAC)
Port C3 (---) ←------¥ ¥／／／/-------→ Port C3 (ATN)
Port C4 (DAV) →--------/／／／¥-------← Port C4 (DAV)
Port C5 (RFD) →--------/／／¥ ¥-------← Port C5 (RFD)
Port C6 (DAC) →--------/／ ＼＼-------← Port C6 (DAC)
Port C7 (ATN) →--------/ ¥--------← Port C7 (---)
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I/O 0051h, 0053h, 0055h, 0057h
Name 320KB FDD I / F
Target PC-9801 1st generation, E, F, M
Chip 8255A equivalent
Function
------------+-------+-----+----------------------------------------------------------
I/O address | Width | R/W | Contents
------------+-------+-----+----------------------------------------------------------
0051h | BYTE | R/W | Port A Read / Write Data
| | | 320KB FDD I / F is used in input mode. Receive data and
| | | status from the FDD subsystem.
0053h | BYTE | R/W | Port B Read / write data
| | | 320KB FDD I / F is used in output mode. Send data and commands
| | | (see table [command list]) to the FDD subsystem.
0055h | BYTE | R | Port C Read
| | | The 320KB FDD I / F uses bits 7-4 in output mode and bits 3-0
| | | in input mode. Each bit is used for the following purposes
| | | (reading of bits 7-4 is for diagnostics).
| | | bit 7: ATN
| | | 1 = When sending a command
| | | 0 = When sending data
| | | bit 6: DAC
| | | 1 = Data reception completed
| | | 0 = Data reception not completed
| | | bit 5: RFD
| | | 1 = Ready to receive data
| | | 0 = Not ready to receive data
| | | bit 4: DAV
| | | 1 = Ready to receive data (command)
| | | 0 = Not ready to receive data (command)
| | | bit 3: Unused
| | | * To bit 7 of PIO port C on the FDD subsystem side
| | | Connected
| | | bit 2: DAC
| | | 1 = Data reception completed
| | | 0 = Data reception not completed
| | | bit 1: RFD
| | | 1 = Ready to receive data
| | | 0 = Not ready to receive data
| | | bit 0: DAV
| | | 1 = Ready to receive data (command)
| | | 0 = Not ready to receive data (command)
0055h | BYTE | W | Port C Light
| | | The 320KB FDD I / F uses bits 7-4 in output mode and bits 3-0 in
| | | input mode. Each bit is used for the purposes shown below.
| | | bit 7: ATN
| | | 1 = Send command
| | | 0 = Data transmission
| | | bit 6: DAC
| | | 1 = Data reception completed
| | | 0 = Data reception not completed
| | | bit 5: RFD
| | | 1 = Ready to receive data
| | | 0 = Not ready to receive data
| | | bit 4: DAV
| | | 1 = Ready to receive data (command)
| | | 0 = Not ready to receive data (command)
| | | bit 3 ~ 0: Invalid due to input mode.
0057h | BYTE | W | Control Register
| | | Refer to the 8255A (equivalent) data sheet for how to use the control register.
------------+-------+-----+----------------------------------------------------------
Explanation u Images of I / O 0051 to 0057h appear in I / O 0059h, 005Bh, 005Dh, 005Fh.
For models equipped with a time stamper, note that I / O 005C to 005Fh
are assigned to the I / O of the time stamper.
Related 0000:055Ch bit 7 ~ 4
0000:0560h
0000:0561h
0000:0562 ~ 0563h
INT 1B - Function nnh (320KB FD)
Table [Command list]
--------+----------------------------------------------------------
Command | Name
--------+----------------------------------------------------------
00h | Initialize
01h | WriteSector
02h | ReadSector
03h | SendData
04h | CopySector
05h | FormatDrive
06h | SendResultStatus
07h | SendDriveStatus
08h | TestMemory
09h | SendMemory1
0Ah | OutMerginePort
0Bh | SendMemory2
0Ch | RecieveMemory
0Dh | ExecuteMemory
0Eh | LoadSector
0Fh | SaveSector
10h | Load and Go
11h | WriteSector (Fast)
12h | SendData (Fast)
13h | SendFDCStatus
14h | SendDeviceStatus
15h | SendMemory (Fast)
16h | Recieve Memory (Fast)
17h | SetSurfaceMode
18h | SendSurfaceMode
19h | SetReadAfterWriteMode
1Ah | ResetReadAfterWriteMode
1Bh | ResumeBreakPoint
1Ch | SetBreakPoint
1Dh | SetRegister
1Eh | SendRegister
--------+----------------------------------------------------------
* The command is sent from port B. Whether the transmitted value is
data or a command is distinguished by the ATN bit on port C.